arm-cortex-m
claudeARM Cortex-M core programming across M0 to M33: CMSIS, startup code, NVIC, SysTick, FPU, MPU, and sleep modes.
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claude
fpga-integration
MCU and FPGA integration: Verilog register interfaces, AXI-Lite and SPI links, timing constraints, and MCU drivers.
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Plugin fpga-integration from marketplace libre-embed in Ormus-Solutions/LibreEmbed-Claude-Code. Commands read from the repo's manifest — 1 month ago.
What it installs
Skills (1)
fpga-patternsSynthesizable Verilog patterns for MCU-FPGA designs on Artix-7 and Cyclone V: register bank with strobes, two-flop clock domain crossing, PWM generator, Vivado block design Tcl, and ILA or SignalTap capture. Use when writing FPGA logic that an MCU drives or debugging it in hardware.
Slash commands (1)
/fpga-integration:fpgaGenerate a Verilog module, a Vivado or Quartus synthesis script, programming commands, or the MCU-side interface driver.
Subagents (1)
fpga-engineerUse this agent when an MCU has to talk to an FPGA: AXI-Lite or SPI register banks in Verilog, Vivado or Quartus flows, XDC timing constraints, the MCU-side driver, or choosing the MCU-FPGA interface. It returns the register map, the Verilog module, the constraints, and the MCU driver.
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