Photonic chip design with Lunima, headless: build, route, simulate, sweep, check and export circuits, analyse and import GDS, design chiplets and build a photonic CPU.
Plugin lunima from marketplace lunima in aignermax/Lunima. Commands read from the repo's manifest — 4 days ago.
This plugin runs code on your machine — it starts local MCP servers. The exact commands are listed below; read them before installing.
chiplet-assemblyDesign multi-chiplet photonic systems with Lunima — create dies with their own fabrication process, place parts per die, link dies through edge couplers, check alignment and per-die design rules, and size the floorplan. Use for chiplets, multi-process assemblies (e.g. SiN next to SOI or InP) and sys
gds-layoutAnalyse, import and export GDS layouts with Lunima — inspect cells and layers, reconstruct a GDS into placed components and connections, export a design to Nazca/GDS and netlists, and round-trip check the result. Use whenever a .gds file or a foundry layout is involved.
logic-and-cpuBuild digital logic and a small processor from photonic circuits with Lunima — turn optical cells into gates with extracted truth tables, compose gates hierarchically, verify networks, clock registers, and run programs of Lunima's 4-bit ISA on the photonic units. Use for gates, adders, ALUs, registe
photonic-circuit-designDesign, route, simulate and verify a photonic integrated circuit with the Lunima MCP tools — from an empty chip or an existing .lun file to a checked, simulated, saved design. Use for MZIs, ring filters, splitter trees, switch fabrics and any component-level PIC work.
lunimaruns: ${LUNIMA_EXE:-lunima} mcp
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