Plugin marketplace
A deterministic RTL build and verify loop for AI coding agents. Enables LLMs to write, test, and extract state machines from Verilog with low hallucinations.
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Token-optimized RTL co-simulation loop for AI coding agents (no API key). Architecture ledger (port/width checks), two-stage iverilog compile guardrail, cocotb golden-model scaffolding, and deterministic FSM extraction to an interactive dark-mode diagram.
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