aws-f2

Plugin aws-f2 from marketplace aws-f2 in rhiannon-ai-llc/f2-skills. Commands read from the repo's manifest — 1 month ago.

Skills (8)

• aws-f2-afi-deploy

  Create, wait for, copy, share, load, verify, clear, or recover an AWS F2 FPGA image from a validated Developer_CL.tar. Use for AFI or AGFI lifecycle, create_afi.py, create-fpga-image, S3 ingestion, wait_for_afi.py, FPGA slots, fpga-load-local-image, fpga-clear-local-image, prefetch/cache, multi-slot

• aws-f2-hdk-project

  Create or adapt an AWS F2 HDK Custom Logic project around existing RTL and IP. Use when scaffolding a CL from CL_TEMPLATE, replacing a board top with cl_ports.vh, integrating OCL/PCIS/PCIM/SDA, DDR, HBM, clocks, resets, interrupts, PCI IDs, constraints, or per-CL synthesis Tcl before simulation and

• aws-f2-host-runtime

  Port, implement, and validate Linux host software for an AWS F2 Custom Logic accelerator. Use for sdk_setup.sh, fpga_mgmt, fpga_pci, Cython bindings, AppPF BAR0 or BAR4, OCL, PCIS, PCIM host memory, MSI-X, AWS_CLK_GEN runtime control, PCI rescans, multiple FPGA slots, f2.48xlarge NUMA placement, per

• aws-f2-migrate-design

  Plan and execute the migration of a traditional self-hosted AMD/Xilinx RTL or Vivado design to AWS EC2 F2 small-shell instances while preserving the algorithmic RTL, verification, and host API where possible. Use for F2 porting, on-prem or Alveo-to-F2 moves, F1-to-F2 moves, VU47P targeting, or an en

• aws-f2-runtime-ami

  Build and validate a production EC2 host image for an AWS F2 accelerator with the toolkit's Runtime AMI Builder, AWS CDK, and EC2 Image Builder. Use when a user asks for ami_tool, an F2 runtime AMI, Image Builder pipeline, host-image dependencies, Vivado Lab/XVC packaging, multi-region AMI distribut

• aws-f2-shell-simulation

  Simulate an AWS F2 HDK Custom Logic design against the supplied shell model, AXI protocol checkers, host-memory model, and SystemVerilog or C/DPI test APIs. Use for F2 CL integration simulation, shell BFM tests, OCL peek/poke, PCIS or PCIM traffic, DDR/HBM simulation, FLR, interrupts, HW/SW cosimula

• aws-f2-vivado-batch-build

  Build an AWS F2 Small Shell Custom Logic design with the HDK's supported Vivado batch Tcl flow and validate the resulting routed DCP package. Use for aws_build_dcp_from_cl.py, vivado -mode batch, build_all.tcl, out-of-context CL synthesis, shell linking, F2 timing closure, clock recipes, build repor

• aws-f2-xvc-debug

  Instrument and debug an AWS F2 AFI with ILA, VIO, the CL Debug Bridge, and Xilinx Virtual Cable over PCIe. Use for F2 virtual JTAG, cl_debug_bridge, connect_debug_cores, matching LTX probes, fpga-start-virtual-jtag, Vivado Lab Hardware Manager, missing debug cores, or multi-slot XVC. Reuses oh-my-fp

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