dark-factory
claudeA repository that maintains and improves itself: WoS game-worlds develop skills, apply them to the repo, and ship through gated CI/CD. One config, one key, it runs.
200 skills
concurrency synchronization primitives and memory models — a cultivated, proof-checked neurosymbolic knowledge module: RAG library, agent brain, growable KB, factory-deepened. 407 concepts.
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Plugin concurrency-synchronization-primitives-a-module in sancovp/dark-factory-live. Commands read from the repo's manifest — 1 month ago.
0.1.1-understand-synchronizes_with[0.1.1] A relation between atomic operations in memory models where a release fence on one thread synchronizes with an
0.1.2-understand-memory_order_relaxed[0.1.2] C11/C++11 memory ordering that only guarantees atomicity of the operation with no ordering constraints relativ
0.1.3-understand-sequentially_consistent[0.1.3] The strongest memory ordering requiring a single total order of all sequentially consistent operations visible
0.1.4-understand-acquire_semantics[0.1.4] Memory ordering semantics ensuring all subsequent loads/stores cannot be reordered before the acquire operatio
0.1.5-understand-happens_before_relation[0.1.5] A fundamental ordering relation in memory models defining that if operation A happens-before operation B, then
0.1.6-understand-c11_memory_model[0.1.6] Standard C11 specification defining memory orderings: memory_order_relaxed, memory_order_consume, memory_order
0-1-understand-concurrency-synchronization-primitives-and-memor[0.1] the concurrency_synchronization_primitives_and_memor subdomain of concurrency synchronization primitives and memory models (99 concepts)
0.2.1-understand-atomic_cas[0.2.1] Compare-and-swap operation atomically loading a value, comparing it to an expected value, and storing a new va
0.2.2-understand-hb_synchronizes_with[0.2.2] A synchronization operation or primitive that establishes an inter-thread happens-before relationship, ensurin
0.2.3-understand-atomic_exchange[0.2.3] Atomic operation that reads the current value of a variable and writes a new value in a single indivisible ste
0.2.4-understand-cache_alignment[0.2.4] Placement of data structures on memory boundaries matching cache line size, typically 64 bytes, preventing fal
0.2-understand-core[0.2] the core subdomain of concurrency synchronization primitives and memory models (4 concepts)
0.3.1-understand-memory_order_relaxed_atomicity_guarantee[0.3.1] The indivisibility guarantee that a relaxed atomic operation completes as a single indivisible step; no interm
0.3.2-understand-indivisibility_property[0.3.2] The fundamental property that a relaxed atomic operation executes as a single indivisible step from the perspe
0.3.3-understand-memory_order_relaxed_vs_acquire[0.3.3] The ordering contrast where acquire_semantics prevents subsequent operations from being reordered before the a
0.3.4-understand-seq_cst_global_total_order[0.3.4] A single total order of all sequentially consistent operations that is visible and agreed upon by all threads
0.3.5-understand-rlx_atomicity_core[0.3.5] The fundamental indivisibility property that any relaxed atomic operation completes as a single non-interrupti
0.3.6-understand-seq_cst_default_atomic_ordering[0.3.6] The default memory ordering for std::atomic operations in C11/C++11 when no memory_order is explicitly specifi
0.3-understand-deep_c11_memory_model[0.3] the deep_c11_memory_model subdomain of concurrency synchronization primitives and memory models (108 concepts)
0.4.1-understand-thundering_herd_contention_surge[0.4.1] A transient spike in the rate of lock or resource acquisition attempts triggered by mass wakeup, producing que
0.4.2-understand-djt_bounding_range[0.4.2] The closed interval [min_delay, previous_delay times decorrelation_factor] from which the uniform random sampl
0.4.3-understand-djt_random_uniform_sample[0.4.3] The uniform random draw within the bounding range that produces the new current_delay value; the randomness de
0.4.4-understand-djt_wave_attenuation[0.4.4] The emergent property that decorrelated jitter reduces the probability of simultaneous retries among competing
0.4.5-understand-thundering_herd_retry_coordination[0.4.5] The phenomenon where concurrently woken threads retry a failing operation in near-lockstep, reinforcing the co
0.4.6-understand-thundering_herd_wait_set[0.4.6] A collection of threads blocked on a single synchronization point awaiting a condition; the structural prerequ
0.4-understand-deep_exponential_backoff[0.4] the deep_exponential_backoff subdomain of concurrency synchronization primitives and memory models (37 concepts)
0.5.1-understand-acquire_fence[0.5.1] A memory ordering primitive that ensures all load and store operations appearing after the fence in program or
0.5.2-understand-hb_program_order[0.5.2] The order of operations as they appear in source code within a single thread; a fundamental component of happe
0.5.3-understand-inter_thread_happens_before[0.5.3] The subset of happens_before relations that cross thread boundaries, established by synchronizes_with connecti
0.5.4-understand-happens_before_order[0.5.4] A transitive, irreflexive partial order over operations in a memory model that defines which operations must a
0.5.5-understand-hb_acquire_semantics[0.5.5] A memory ordering guarantee where all subsequent memory operations become visible only after the acquire opera
0.5.6-understand-hb_release_semantics[0.5.6] A memory ordering guarantee where all prior memory operations become visible before the release operation; pai
0.5-understand-deep_happens_before_relat[0.5] the deep_happens_before_relat subdomain of concurrency synchronization primitives and memory models (48 concepts)
0.6.1-understand-rmw_ind_001[0.6.1] rmw_operation: an atomic fetch_add, fetch_sub, fetch_or, fetch_and, fetch_xor, fetch_max, fetch_min, or fetch_
0.6.2-understand-isi_operation_completeness[0.6.2] The property that a relaxed atomic operation executes to full completion before any observer can witness its e
0.6.3-understand-isi_no_in_flight_state[0.6.3] The guaranteed absence of any transient value during operation execution that could be sampled by a concurrent
0.6.4-understand-rmw_ind_006[0.6.4] modification_order_commitment: the serialization of the RMW operation into the global modification order of th
0.6.5-understand-rmw_ind_003[0.6.5] modify_phase: the purely computational step wherein the value captured in the read phase is transformed by the
0.6.6-understand-rmw_ind_004[0.6.6] write_phase: the final step wherein the result of the modify phase is written atomically to the target variabl
0.6-understand-deep_indivisibility_prope[0.6] the deep_indivisibility_prope subdomain of concurrency synchronization primitives and memory models (19 concepts)
0.7.1-understand-jitter[0.7.1] Randomized variance introduced into the computed delay to decorrelate competing threads and mitigate thunderin
0.7.2-understand-current_delay[0.7.2] The computed wait interval for the current retry iteration; derived from base_delay multiplied by backoff_mult
0.7.3-understand-mcs_lock_enqueue[0.7.3] Operation appending a thread-local qnode to the queue tail; atomically CASes qnode into tail; on CAS failure,
0.7.4-understand-base_delay[0.7.4] Initial wait time in nanoseconds or microseconds before the first lock acquisition retry; the starting point o
0.7.5-understand-mcs_lock_qnode[0.7.5] Thread-local queue node containing locked flag and successor pointer; must be cache-aligned and allocated per-
0.7.6-understand-mcs_lock_release[0.7.6] Operation by which a thread releases the lock; sets own qnode.locked to false to unblock spinning successor; i
0.7-understand-deep_spinlock[0.7] the deep_spinlock subdomain of concurrency synchronization primitives and memory models (20 concepts)
0.8.1-understand-c11_atomic[0.8.1] The C11/C++11 memory model defined by the ISO standard; defines six memory orders (relaxed, consume, acquire,
0.8.2-understand-memory_order_acquire[0.8.2] Memory ordering barrier ensuring all loads and stores after the barrier in program order cannot be reordered b
0.8.3-understand-full_fence[0.8.3] A memory fence providing both acquire and release semantics; no memory operation on the issuing core may be re
0.8.4-understand-happens_before[0.8.4] transitive closure of program_order and synchronizes_with relations; the ordering guarantee that prevents data
0.8.5-understand-memory_order_release[0.8.5] Memory ordering barrier ensuring all loads and stores before the barrier in program order cannot be reordered
0.8.6-understand-dependency_chain[0.8.6] data or control dependency from one operation to another; under consume semantics substitutes for synchronizes
0.8-understand-deep_synchronizes_with[0.8] the deep_synchronizes_with subdomain of concurrency synchronization primitives and memory models (72 concepts)
0-understand-concurrency-synchronization-primitives-and-memory-models[0] the concurrency synchronization primitives and memory models library — every skill a certified region of the KB; call number = home : facets
using-concurrency-synchronization-primitives-aUse the concurrency synchronization primitives and memory models neurosymbolic module: RAG library, agent brain, growable KB — proof-checked
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