claude

gpu-llamacpp-g5g-2b-q4_0

EC2 G5g DevOps for the llama.cpp Gemma 4 E2B rig serving the QAT Q4_0 GGUF: instance lifecycle, G-family quotas, arm64 GPU DLAMI resolution, from-source llama.cpp build pinned to CMAKE_CUDA_ARCHITECTURES=75, and SRE diagnostics via the gpu-llamacpp-g5g-2b-q4_0 MCP server. Serves google/gemma-4-E2B-it-qat-q4_0-gguf on an NVIDIA T4G (Turing, SM 7.5) behind a Graviton2 host. Scaffolded 2026-09-02 and HAS SERVED NOTHING. The only rig here serving 4-bit weights on a GPU: vLLM 0.26.0 has no gguf module on any platform, no GGUF reader exists in JAX, and transformers dequantizes to fp32 while silently dropping 35 layer_scalar tensors. It compiles because llama.cpp publishes no prebuilt Linux aarch64 CUDA binary — the asymmetry against its gpu-ollama-g5g-2b-q4_0 sibling, which ships one with native sm_75 SASS.

3 on GitHubby xbill9v0.1.0Apache-2.0updated yesterday
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Plugin gpu-llamacpp-g5g-2b-q4_0 from marketplace gemma4-dev in xbill9/gemma4-dev. Commands read from the repo's manifest — yesterday.

This plugin runs code on your machine — it starts local MCP servers. The exact commands are listed below; read them before installing.

What it installs

Skills (1)

  • gpu-llamacpp-g5g-2b-q4_0-management

    Manage AWS EC2 G5g capacity (Graviton2 + NVIDIA T4G) and Gemma 4 E2B Q4_0 GGUF serving under llama.cpp. Use when the user asks about provisioning, launching, listing, or terminating G5g instances, building or debugging llama.cpp on T4G / Turing / aarch64, serving a GGUF or QAT 4-bit checkpoint on a

MCP servers (1)

  • gpu-llamacpp-g5g-2b-q4_0

    runs: python3 ${CLAUDE_PLUGIN_ROOT}/skills/gpu-llamacpp-g5g-2b-q4_0-management/mcp/server.py

View source on GitHub

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EC2 G4dn DevOps for the pure-JAX Gemma 4 E2B rig: instance lifecycle, G-family quotas, x86_64 GPU DLAMI resolution, JAX-on-Turing verification, and SRE diagnostics via the gpu-jax-g4dn-2b MCP server. Serves google/gemma-4-E2B-it on an NVIDIA T4 (Turing, SM 7.5, 15360 MiB measured). Forked from gpu-jax-g5g-2b 2026-08-28 as the A/B control that separates Turing from Graviton2, and first served 2026-08-29: decode 13.1 tok/s against the T4G's 13.10, weight bytes identical to the byte, and the xprof profile reproducing 54.4% dtype conversion / 32.8% fp32 GEMV / 0.0% TensorCore — so the sibling's dtype tax is a chip finding, not a host one.

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EC2 G5g DevOps for the pure-JAX Gemma 4 E2B rig: instance lifecycle, G-family quotas, arm64 GPU DLAMI resolution, JAX-on-Turing verification, and SRE diagnostics via the gpu-jax-g5g-2b MCP server. Serves google/gemma-4-E2B-it on an NVIDIA T4G (Turing, SM 7.5) behind an AWS Graviton2 host — no build, no CUDA toolkit, no Triton patch, because jax[cuda12] publishes aarch64 wheels that already carry sm_75.

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EC2 G6 DevOps for the pure-JAX Gemma 4 E2B rig: instance lifecycle, G-family quotas, x86_64 GPU DLAMI resolution, JAX-on-Ada verification, and SRE diagnostics via the gpu-jax-g6-2b MCP server. Serves google/gemma-4-E2B-it on an NVIDIA L4 (Ada, SM 8.9, 23034 MiB). Forked from gpu-jax-g5g-2b 2026-08-28 to move the same engine off Turing onto a native bfloat16 datapath: measured the same day at 48.3-48.5 tok/s against the T4G's 12.80 at an identical config, with the 54% dtype-conversion tax at 0.0% and decode at the bandwidth roofline.

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