EDA tool detection, output-filtering shell wrappers, MCP server config templates, and memory distillation for all chip-design domain agents
2 skills · 1 agent
231
claude
chip-design-fpga
FPGA emulation — ASIC-to-FPGA adaptation, partitioning, bring-up, SW validation
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Plugin chip-design-fpga from marketplace digital-chip-design-agents in hdl-tools/digital-chip-design-agents. Commands read from the repo's manifest — 2 days ago.
What it installs
Skills (1)
fpga-emulationFPGA prototyping — ASIC-to-FPGA RTL adaptation, multi-FPGA partitioning, synthesis and timing closure on FPGA, hardware bring-up, and software validation on the prototype. Use when porting an ASIC design to Xilinx or Intel FPGA for pre-silicon software development and hardware validation.
Subagents (1)
fpga-orchestratorOrchestrates FPGA prototyping — ASIC-to-FPGA RTL adaptation, partitioning, FPGA synthesis, hardware bring-up, and software validation. Invoke when porting an ASIC design to Xilinx or Intel FPGA for pre-silicon software development and hardware validation. - digital-chip-design-agents:fpga-emulation
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